1. Field of the Invention
The invention relates to a micro-structure capacitor that is applied in high surface area/volume ratio capacitors and micro reactors.
2. Related Art
A capacitor is one of three passive devices and its main function is to store electric charge. There are aluminum electrolytic capacitors, tantalum electrolytic capacitors, ceramic capacitors, electrolytic capacitors, and others. Capacitors can be simply divided into fixed capacitors, variable capacitors, and chip capacitors. Ceramic capacitors can be divided into single layer ceramic capacitors (disk ceramic capacitors) and multi layer ceramic capacitors (MLCC).
MLCCs have compact size, which is required for modem electronic devices, and they also provide the following advantages: high capacity, low inner inductance that makes them suitable for high frequency, high insulation, low current leakage, high stability because the inner electrode is protected by ceramic and not easily effected by the environment, high thermal resistance, non polarity, and surface mount. Because of the features mentioned above, MLCCs are widely applied in cellular phones and laptop computers, which need smaller sized capacitors.
The size of the MLCC has to be smaller and smaller because electronic devices are becoming more and more compact. In order to maintain large capacitance, more layers inside the MLCC are necessary. Miniaturization of material particles and controlling of layers have to be considered in the manufacturing process. Because the manufacturing temperature is as high as 300-400 degree C, one must take thermal resistance into consideration when selecting materials. These points mentioned above indicate that the manufacturing processes, selection of material, and packaging are becoming more and more difficult. Another type of porous micro-structure capacitor uses a three-dimensional structure such as multiple grooves to increase the surface area of electrodes A thin film process is then used to reduce the thickness in order to obtain a micro structure capacitor with high capacitance. However, it is very difficult to have a layer of thin film coated on the pore with high aspect ratio (depth/width ratio). That is to say, a regular etching process is not able to obtain deep etching so the quality of the product is not uniform. When the aspect ratio of a micro structure pore increases, the coating process usually ends up creating thicker coating in the opening of the pore and thinner coating in the bottom of the pore, or the opening is blocked so the bottom portion is not coated at all.
These conventional micro-structure capacitors that put emphasis on high porosity and high aspect ratio for obtaining high electrode surface area are always three-dimensional, so the capacitance increases as the electrode surface area increases. However, pore size is not very uniform because it is not well controlled, so the capacitance can""t be easily controlled. Because very deep pores are required to obtain high capacitance, the coating process usually produces a thicker layer in the opening and thinner layer in the bottom of the pores. The thin-film layer generated by a regular sputtering instrument is unable to achieve good coverage over the pores with high aspect ratio.
Because of the problems of conventional techniques and the requirements of micro-structure capacitors, the invention provides a micro-structure capacitor having micro-structure and high capacitance.
According to the technique disclosed in the invention, the micro-structure capacitor of the invention stacks up micro-structure devices with uniform pores to increase capacitance. Each micro-structure device contains low aspect ratio and uniform porosity. The best aspect ratio is about 5:1, though a range between 5:1 to 10:1 is also acceptable. The manufacturing process is thus easier and those devices requiring a high surface area to volume ratio are easier to produce.
The micro-structure capacitor of the invention uses SOI (silicon on insulator) as an etching stop layer. A wet etching process is performed and then stopped at the etching stop layer. Therefore, uniform etching depth can be obtained. After pores are produced by the etching process, a layer of high dielectric constant thin film is formed on the SOI substrate, and then a metal layer is formed on the thin film. Metal layers with uniform porosity obtained by the above process are then bonded together to form a micro-structure capacitor. Different metal joining methods can be used to form micro-structure capacitors with different structures. For example, micro structure devices can be stacked up to form a multi layer micro-structure capacitor, or micro structure devices can be joined parallel to one another to form a multi parallel layer micro-structure capacitor. Each of the micro-structure capacitors features very small size and high capacitance.
SOI (silicon on insulator) is used as the etching stop layer in the invention. Wet etching is used for producing multiple pores with uniform depth. The invention provides integration of devices so electrodes with high surface area and pores with better coating ability can be obtained even if the aspect ratio is reduced.
Further scope of applicability of the invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.